In present day data-processing systems, magnetic tape decks are commonly used because they have large storage capacity, and require relatively short times for magnetic read/write heads to access data contained anywhere on the magnetic recording tapes from the moment when the heads receive a data access command from the processing system. Magnetic tapes carry data, in coded (usually binary) form, on parallel recording tracks (usually nine) having widths that do not exceed a few hundredths of a millimeter. It is current practice for tape decks to carry only a single removable magnetic tape which is replaced by another tape as soon as reading and/or writing operations involving the first tape have been completed.
Each read-out track of a tape has associated with it a read/write head which is positioned very close to, or even in contact with, the track. The tape moves discontinuously past an assembly formed by the heads for all of the recording tracks. The discontinuous movement is a sequence of "unitary movements", each comprising: (a) a tape speed up phase, during which the tape has a high acceleration; (b) a phase during which the tape moves at a substantially constant speed V.sub.O, and (c) a braking phase during which the tape has a high deceleration until it is completely stopped. It is current practice for the data to be read, during each "unitary movement", after the speed up phase, while the tape is moving at constant speed V.sub.O.
What are termed slow variations in the tape speed are speed variations about speed V.sub.O which take place while the data are read. Frequently these variations are .+-.25% of the speed V.sub.O and sometimes as great as .+-.50% of V.sub.O. The duration of these variations is a few fractions of a millisecond. Instantaneous variations in the tape speed, on the other hand, are speed variations having durations approximately a hundred to a thousand times shorter than that of the slow variations.
When binary data bits recorded on a magnetic tape pass by an assembly of magnetic read/write heads associated with all of the recording tracks, each of the heads derives a series of analogue electric signals which are shaped into a series of square-wave electrical pulses by shaping circuits. The pulse voltage varies between minimum and maximum values V.sub.min and V.sub.max. For ease of exposition, a description will be given only to the signals derived by a single head; it is to be understood that the same description is equally applicable to the signals derived by the other heads. The leading edge of the electrical pulse is that part of the pulse during which the voltage changes from the value V.sub.min to the value V.sub.max. Oppositely, the trailing edge of a pulse is that part of the pulse during which the voltage changes from the value V.sub.max to the value V.sub.min. The binary codes most frequently used to indicate data on magnetic tapes are such that, after the signals have been read and shaped, a bit equal to "logic one" corresponds to a leading or positive going edge of a pulse while a bit equal to "logic zero" corresponds to the trailing or negative going edge of a pulse.
The series of transduced square-wave electrical pulses constitutes a substantially cyclic signal DE having a nominal means frequency F.sub.O and period T.sub.O ; hence, T.sub.O defines a single signal bit or "bit cell period". It is clear that the frequency F.sub.O of the transduced signal is proportional to the tape speed. Hence, the higher the tape speed, the greater the number of data items read by the magnetic head per unit of time, whereby frequency F.sub.O corresponds to speed V.sub.O. For any variation in the tape speed there is a corresponding frequency variation. Thus for a slow tape speed variation there is a corrresponding low frequency and for an instantaneous speed variation there is a corresponding instantaneous frequency variation.
If t.sub.O is the time at which a given `bit cell` begins, the time (t.sub.0 +T.sub.0 /2) is termed the "center of the bit cell" and the time (t.sub.0 +T.sub.0) is termed the "end of the bit cell". Each cell contains either a leading or trailing pulse edge situated in the center of the cell, and possibly, a leading or trailing edge at the end of the cell. Only rising or decaying edges situated in the center of "bit cells" are considered to represent bit values.
Signal DE is similarly defined as being formed by a sequence of a first set of even bit cells CB.sub.O, CB.sub.2, CB.sub.4, CB.sub.i . . . CB.sub.2n interleaved with a sequence of a second set of odd bit cells CB.sub.1, CB.sub.3, CB.sub.j . . . CB.sub.2n+1, where n is a hole number.
The transduced signal DE is supplied to an apparatus for detecting the data recorded on the magnetic tape of the tape deck. Such a detecting apparatus determines the value of each of the data bits recorded on magnetic tape and operates in three phases. During phase one, all the leading or trailing pulse edges in the center of each cell bit of signal DE are recognized to determine the value of the data bits. During phase two, each of the recognized edges is converted into a signal having an amplitude that remains constant during the period T.sub.0 of this cell. A leading edge is converted into a signal of constant positive amplitude which is termined a "high level", whereas a trailing edge is converted into a signal of constant negative amplitude which is termed a "low level". The positive and negative amplitude signals are referred to collectively by the name "signal DEI". During phase three, the value of the bit corresponding to each cell is determined from signal DEI during each period T.sub.O. High and low levels respectively correspond to bit values of one or zero.
Imperfections in the magnetic tape and magnetic reading heads, as well as slow and instantaneous tape speed variations, cause distorition in both the amplitude and the phase of the signals read by the head, so that the signal amplitude is reduced and is phase shifted. The distortion is increased by the electronic shaping circuits and the data detecting apparatus and is manifested as a shift in the time position of the edges at the beginning or center of the bit cell. It can further be shown that the distortion increases as the density of the data recorded on the magnetic tape increases, that is, as the number of data items recorded per unit of length of the magnetic tape increases. The phase and amplitude distortion of signals DE and DEI may be relatively severe.
In the prior art there are simple and effective magnetic tape data-detecting devices which enable data bits to be detected with very great accuracy despite considerable phase and amplitude distortion in the signal DEI. Such an arrangement comprises an electric clock circuit which is synchronized by signal DE to derive a clock signal H of the same frequency as signal DE. A level transposition device responds to signals DE and H to perform phases 1 and 2 described supra, and transmit a signal DEI to an integrating apparatus which preferably comprises first and second capacitive integrators each of which is associated with a zero reset circuit. The first and second integrators also respond to signal H so that the first integrator integrates each of the high and low levels of signal DEI during each even bit cell period T.sub.0 and is reset to zero by the zero reset circuit associated with it during each of the odd bit cell periods T.sub.0. The second integrator integrates each of the high and low levels of signal DEI during period T.sub.0 of each odd bit cell and is reset to zero by the zero reset circuit associated with it during each of the even bit cell periods T.sub.0. During each integrating period T.sub.0, the integrating apparatus performs one integration, whereby period T.sub.0 is termed an integrating period.
By definition, "resetting an integrator to zero" is a term arbitrarily used for an operation which involves returning the integrator to an initial rest state where the integrator output remains constant over a time interval; this term is used even though the voltage at neither of the terminals of the capacitive integrating member equals zero.
The integrating arrangement derives a signal DEINT which is coupled to a decision circuit which determines the polarity of signal DEINT at the end of each bit cell period T.sub.0. If the polarity is positive or negative, the corresponding bit is equal to one or zero.
If it is desired to detect, by integration, signals having frequencies lower than the frequencies of the signals read from tape decks or other memories involving magnetic recording media, or if the loss of time due to resetting the integrators to zero does not have an adverse effect on the detection accuracy, it is possible to use an integrating apparatus having only a single integrator containing a PG,8 capacitive integrating member.
Simple, reliable and inexpensive integrating devices which integrate with a high degree of precision are known. Such a device is described for example in co-pending U.S. patent application, Ser. No. 959,097, entitled "Apparatus for and Method of Integrating a Series of Electric Signals", filed by the present applicants on Nov. 9, 1978, now U.S. Pat. No. 4,188,620.
The integrating device disclosed in the co-pending application comprises at least one integrator containing a capacitive integrating member. Each integrator is associated with a zero reset circuit which resets the integrator to zero at the end of each integrating operation. A device for controlling the integrator receives signal DEI to be integrated and clock signal H. The control device determines the direction and duration of the charging current for the capacitive member, so that the polarity of the integrated signal DEINT at the terminals of the capacitive member is the same as that of signal DEI, and signal DEINT has a duration of period T.sub.0. A current generator supplies the capacitive integrating member with a current proportional to the frequency F.sub.O of the signal DE.
Such an integrating device derives an output signal DEINT having a voltage V.sub.C that remains constant regardless of slow variations in the frequency F.sub.O, which reflects the speed of a magnetic tape on a deck. Voltage V.sub.C remains at sufficient amplitude during the instantaneous variations of frequency F.sub.O to enable the polarity of signal DEINT to be determined with sufficient accuracy.
Simple and inexpensive zero reset circuits are also known. One such circuit disclosed in the previously mentioned application, comprises four diodes, preferably of the Schottky type, arranged as a bridge. A first pair of opposite bridge terminals is supplied with different constant voltages. A second pair of opposite bridge terminals are such that one of the second terminals is connected to a terminal of the capacitive member of that integrator which is associated with the zero reset circuit. The voltage at the terminal of the capacitive member varies as a function of the voltage V.sub.C (the voltage at the other terminal of the capacitive member remaining constant). The other terminal of the second terminals carries a constant reference voltage.
The integrating arrangement is reset to zero when both of the second bridge terminals are at the same potential, which balances the bridge.